Intel Silicion Validation Job Description:
1.ASIC基础
（1）digital intergrated circut design （数字集成电路设计）
（2）digital design principles and practices （数字设计——原理与实践）
（3）advanced digital design with the verilog HDL（verilog HDL高级数字设计）
（4）cliford.E.cumming 论文集
2. 懂一款MCU
MCU：ARM MIPS等
总线：AMBA AXI等
3.熟悉模拟电路及数模混合设计，应用系统
4.熟悉门级设计、数字后端
5.熟悉CHECK LIST
6.熟悉UNIX工具
大部分IC公司的工作环境都是基于UNIX工作站的，熟悉常用命令和熟练使用一种编辑工具，对于工作效率的提高会有很大帮助，如目前常用的编辑工具VIM、EMACS等
7.脚本语言
shell、Perl（或者Python）脚本语言是工作的基础，应熟练掌握。《perl语言入门》《perl语言编程》《perl高效编程》《Python核心编程》
8.其他语言
systemverilog和C++被广泛应用在验证模型或者验证环境中熟悉这些语言是做前端设计的基本要求。《C++primer》
Development Job Description:
只要有嵌入式开发经验，比如RTOS such as FreeRTOS, RT-thread, Zephyr, 嵌入式linux，都可以将resume发过来。
Validation Job Description:
- A senior validation development engineer position in Intel IPG(IP Engineering Group) Shanghai Zizhu site.
- Core team to validate sensor and vision SW/FW IPs which are integrated to Intel SoCs.
- Opportunity to work for Industry leading firmware/software on sensor, vision, BIOS, etc domain technology.
- High level test plan development, test cases development, test execution, test report and automation.
- Handle the validation execution of FW/SW ingredients, system integration and E2E flows on Intel sensor, vision, etc. technology.
- Sensor and vision solution issue reproducing, first level triage on platform and component level both, and following up with key stake holders.
- Unattended automation infrastructure development from feature, code integration to test indicator.
- Chance to expand expertise on multiple cutting-edge IPs.
- Close working with domestic and global teams to drive the program success.
- Highlight and escalate risk point to Execution Team and PDT based on project milestones
Qualifications:
The candidate should major in Computer Science, or Electronics Engineering, or related. Additional qualifications include:
- Validation experiences on Windows and/or Linux and/or RTOS and/or BSP software quality control.
- Familiar with sensor, vision FW and SW driver validation knowledge, include pre-silicon validation on FPGA, QEMU and other virtual platforms.
- Experienced on ingredient/system issue triage and debug.
- Windows device/system level HLK certificate is a big plus.
- Solid programing and debug skills, C/C++/python or embedded system programming experience is a plus.
- Build/automation test related experience (Jenkins/Quickbuild/Github/TeamCity) is a plus.
- Good communication skill in English.
- Self-motivated, initiative, creative and good team work.
DevOPS Job Description:
有jenkins, CI 和python 开发的经验都可以。